hbldr: fix DSPmem mapping and give access to all Arm11 IO regs
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@ -175,11 +175,15 @@ static const u32 kernelCaps[] =
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// Normal applications only have access to 0x1FF50000-0x1FF58000, 0x1FF70000-0x1FF78000,
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// Normal applications only have access to 0x1FF50000-0x1FF58000, 0x1FF70000-0x1FF78000,
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// however we can load unsigned DSP firmware binaries.
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// however we can load unsigned DSP firmware binaries.
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0xFF81FF00, // RW static range mapping: 0x1FF00000 (DSP RAM, start)
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0xFF81FF00, // RW static range mapping: 0x1FF00000 (DSP RAM, start)
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0xFF81FF80, // RW static range mapping: 0x1FF80000 (DSP RAM, end)
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0xFF91FF80, // RW static range mapping: 0x1FF80000 (DSP RAM, end)
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0xFF91F000, // RO static range mapping: 0x1F000000 (VRAM, start)
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0xFF91F000, // RO static range mapping: 0x1F000000 (VRAM, start)
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0xFF91F600, // RO static range mapping: 0x1F600000 (VRAM, end)
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0xFF91F600, // RO static range mapping: 0x1F600000 (VRAM, end)
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// Give access to all Arm11-accessible IO
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0xFF81EC00, // RW IO range mapping: 0x1EC00000 (PA 0x10100000, start)
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0xFF81F000, // RW IO range mapping: 0x10500000 (PA 0x10500000, end)
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0xFF002109, // Exflags: APPLICATION memtype + "Shared page writing" + "Allow debug" + "Access core2"
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0xFF002109, // Exflags: APPLICATION memtype + "Shared page writing" + "Allow debug" + "Access core2"
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0xFE000200, // Handle table size: 0x200
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0xFE000200, // Handle table size: 0x200
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