diff --git a/source/firm.c b/source/firm.c index 87001a9..0cd1356 100755 --- a/source/firm.c +++ b/source/firm.c @@ -61,7 +61,7 @@ void main(void) bootType = 1; //'0' = NATIVE_FIRM, '1' = TWL_FIRM, '2' = AGB_FIRM - firmType = *(vu8 *)0x23F00005 - 0x2F; + firmType = *(vu8 *)0x23F00005 - '0'; nandType = CONFIG(16, 3); firmSource = CONFIG(18, 1); @@ -71,7 +71,7 @@ void main(void) else { bootType = 0; - firmType = 1; + firmType = 0; //Determine if booting with A9LH u32 a9lhBoot = !PDN_SPI_CNT ? 1 : 0; @@ -182,9 +182,9 @@ void main(void) } } - loadFirm(firmType, firmType == 1 && (nandType == 2 || updatedSys == !nandType)); + loadFirm(firmType, !firmType && (nandType == 2 || updatedSys == !nandType)); - if(firmType == 1) patchNativeFirm(firmType, nandType, emuHeader, a9lhInstalled); + if(!firmType) patchNativeFirm(nandType, emuHeader, a9lhInstalled); else patchTwlAgbFirm(firmType); launchFirm(bootType); @@ -193,10 +193,10 @@ void main(void) //Load FIRM into FCRAM static inline void loadFirm(u32 firmType, u32 externalFirm) { - u32 firmSize; - section = firm->section; + u32 firmSize; + if(externalFirm) { const char *path = "/aurei/firmware.bin"; @@ -215,32 +215,34 @@ static inline void loadFirm(u32 firmType, u32 externalFirm) if(!firmSize) { - firmRead((u8 *)firm, firmFolders[firmType - 1][console]); + firmRead(firm, firmFolders[firmType][console]); decryptExeFs((u8 *)firm); } } -static inline void patchNativeFirm(u32 firmType, u32 nandType, u32 emuHeader, u32 a9lhInstalled) +static inline void patchNativeFirm(u32 nandType, u32 emuHeader, u32 a9lhInstalled) { u8 *arm9Section = (u8 *)firm + section[2].offset; + u32 nativeFirmType; + if(console) { //Determine if we're booting the 9.0 FIRM - if(arm9Section[0x51] == 0xFF) firmType--; + nativeFirmType = (arm9Section[0x51] == 0xFF) ? 0 : 1; //Decrypt ARM9Bin and patch ARM9 entrypoint to skip arm9loader - arm9Loader((u8 *)firm + section[2].offset, firmType); + arm9Loader((u8 *)firm + section[2].offset, nativeFirmType); firm->arm9Entry = (u8 *)0x801B01C; } else { //Determine if we're booting the 9.0 FIRM u8 firm90Hash[0x10] = {0x27, 0x2D, 0xFE, 0xEB, 0xAF, 0x3F, 0x6B, 0x3B, 0xF5, 0xDE, 0x4C, 0x41, 0xDE, 0x95, 0x27, 0x6A}; - if(memcmp(section[2].hash, firm90Hash, 0x10) == 0) firmType--; + nativeFirmType = (memcmp(section[2].hash, firm90Hash, 0x10) == 0) ? 0 : 1; } - if(firmType == 1 || nandType) + if(nativeFirmType || nandType) { //Find the Process9 NCCH location u8 *proc9Offset = getProc9(arm9Section, section[2].size); @@ -249,7 +251,7 @@ static inline void patchNativeFirm(u32 firmType, u32 nandType, u32 emuHeader, u3 if(nandType) patchEmuNAND(arm9Section, proc9Offset, emuHeader); //Apply FIRM reboot patches, not on 9.0 FIRM as it breaks firmlaunchhax - if(firmType == 1) patchReboots(arm9Section, proc9Offset); + if(nativeFirmType) patchReboots(arm9Section, proc9Offset); } //Apply FIRM0/1 writes patches on sysNAND to protect A9LH diff --git a/source/firm.h b/source/firm.h index 9df1dc2..be56203 100644 --- a/source/firm.h +++ b/source/firm.h @@ -39,7 +39,7 @@ typedef struct patchData { } patchData; static inline void loadFirm(u32 firmType, u32 externalFirm); -static inline void patchNativeFirm(u32 firmType, u32 emuNAND, u32 emuHeader, u32 a9lhSetup); +static inline void patchNativeFirm(u32 emuNAND, u32 emuHeader, u32 a9lhSetup); static inline void patchEmuNAND(u8 *arm9Section, u8 *proc9Offset, u32 emuHeader); static inline void patchReboots(u8 *arm9Section, u8 *proc9Offset); static inline void injectLoader(void); diff --git a/source/fs.c b/source/fs.c index 3ea58ef..d6e17cb 100644 --- a/source/fs.c +++ b/source/fs.c @@ -71,7 +71,7 @@ u32 fileExists(const char *path) return exists; } -void firmRead(u8 *dest, const char *firmFolder) +void firmRead(void *dest, const char *firmFolder) { char path[48] = "1:/title/00040138/00000000/content"; memcpy(&path[18], firmFolder, 8); diff --git a/source/fs.h b/source/fs.h index d54fd1b..c25f204 100644 --- a/source/fs.h +++ b/source/fs.h @@ -13,4 +13,4 @@ u32 fileRead(void *dest, const char *path, u32 size); u32 fileWrite(const void *buffer, const char *path, u32 size); u32 fileSize(const char *path); u32 fileExists(const char *path); -void firmRead(u8 *dest, const char *firmFolder); \ No newline at end of file +void firmRead(void *dest, const char *firmFolder); \ No newline at end of file diff --git a/source/start.s b/source/start.s index b24ee77..df72b5a 100644 --- a/source/start.s +++ b/source/start.s @@ -11,11 +11,11 @@ start: mov sp, #0x27000000 @ Give read/write access to all the memory regions - ldr r5, =0x33333333 - mcr p15, 0, r5, c5, c0, 2 @ write data access - mcr p15, 0, r5, c5, c0, 3 @ write instruction access + ldr r0, =0x33333333 + mcr p15, 0, r0, c5, c0, 2 @ write data access + mcr p15, 0, r0, c5, c0, 3 @ write instruction access - @ Sets MPU permissions and cache settings + @ Set MPU permissions and cache settings ldr r0, =0xFFFF001D @ ffff0000 32k ldr r1, =0x01FF801D @ 01ff8000 32k ldr r2, =0x08000027 @ 08000000 1M @@ -38,11 +38,11 @@ start: mcr p15, 0, r0, c2, c0, 1 @ Inst cacheable 0, 2, 5 @ Enable caches - mrc p15, 0, r4, c1, c0, 0 @ read control register - orr r4, r4, #(1<<12) @ - instruction cache enable - orr r4, r4, #(1<<2) @ - data cache enable - orr r4, r4, #(1<<0) @ - mpu enable - mcr p15, 0, r4, c1, c0, 0 @ write control register + mrc p15, 0, r0, c1, c0, 0 @ read control register + orr r0, r0, #(1<<12) @ - instruction cache enable + orr r0, r0, #(1<<2) @ - data cache enable + orr r0, r0, #(1<<0) @ - mpu enable + mcr p15, 0, r0, c1, c0, 0 @ write control register @ Flush caches mov r0, #0