035c50c625
- Move emuNAND hook to ITCM, fixing previously untested emuNAND support for 5.0 (and possibly more versions). This was a very long-standing bug - Fix booting on versions 4.x to 8.x, and restore full support for 5.x to 8.x. All Arm11 custom sysmodules and k11ext have been disabled on 4.x because the Luma3DS v13.0 changes couldn't be ported (this means no Rosalina and no region-free and such, and while I could restore some of the functionality, you should just update *after* installing Luma, like you've been instructed to)
64 lines
1.5 KiB
ArmAsm
64 lines
1.5 KiB
ArmAsm
.section .emunand_patch, "aw", %progbits
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.arm
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.align 4
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@ Code originally by Normmatt
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.global emunandPatch
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emunandPatch:
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@ Original code that still needs to be executed
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mov r4, r0
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mov r5, r1
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mov r7, r2
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mov r6, r3
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@ End
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@ If we're already trying to access the SD, return
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ldr r2, [r0, #4]
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ldr r1, emunandPatchSdmmcStructPtr
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cmp r2, r1
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beq out
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str r1, [r0, #4] @ Set object to be SD
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ldr r2, [r0, #8] @ Get sector to read
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cmp r2, #0 @ For GW compatibility, see if we're trying to read the ncsd header (sector 0)
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ldr r3, emunandPatchNandOffset
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add r2, r3 @ Add the offset to the NAND in the SD
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ldreq r3, emunandPatchNcsdHeaderOffset
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addeq r2, r3 @ If we're reading the ncsd header, add the offset of that sector
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str r2, [r0, #8] @ Store sector to read
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out:
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@ Restore registers.
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mov r1, r5
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mov r2, r7
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mov r3, r6
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@ Return 4 bytes behind where we got called,
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@ due to the offset of this function being stored there
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mov r0, lr
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add r0, #4
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bx r0
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.pool
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.global emunandPatchSdmmcStructPtr
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.global emunandPatchNandOffset
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.global emunandPatchNcsdHeaderOffset
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emunandPatchSdmmcStructPtr: .word 0 @ Pointer to sdmmc struct
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emunandPatchNandOffset: .word 0 @ For rednand this should be 1
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emunandPatchNcsdHeaderOffset: .word 0 @ Depends on nand manufacturer + emunand type (GW/RED)
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.pool
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.balign 4
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_emunandPatchEnd:
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.global emunandPatchSize
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emunandPatchSize:
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.word _emunandPatchEnd - emunandPatch
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