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101 lines
3.0 KiB
ArmAsm
101 lines
3.0 KiB
ArmAsm
/*
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* This file is part of open_agb_firm
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* Copyright (C) 2021 derrek, profi200
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "asm_macros.h"
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#include "arm.h"
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#include "mem_map.h"
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.syntax unified
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.cpu mpcore
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.fpu vfpv2
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.macro EXCEPTION_ENTRY name, type
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BEGIN_ASM_FUNC \name
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msr cpsr_f, #\type @ Abuse conditional flags in cpsr for temporary exception type storage
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b exceptionHandler
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END_ASM_FUNC
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.endm
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EXCEPTION_ENTRY undefInstrHandler, 0<<29
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EXCEPTION_ENTRY prefetchAbortHandler, 1<<29
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EXCEPTION_ENTRY dataAbortHandler, 2<<29
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BEGIN_ASM_FUNC exceptionHandler
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sub sp, #84
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stmia sp, {r0-r14}^ @ Save all user/system mode regs except pc
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mrs r2, spsr @ Get saved cpsr
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mrs r3, cpsr
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lsr r0, r3, #29 @ Get back the exception type from cpsr
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and r1, r2, #PSR_MODE_MASK
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cmp r1, #PSR_USER_MODE
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beq exceptionHandler_skip_other_mode
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add r4, sp, #32
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msr cpsr_c, r2
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stmia r4!, {r8-r14} @ Some regs are written twice but we don't care
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msr cpsr_c, r3
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exceptionHandler_skip_other_mode:
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str lr, [sp, #60] @ Save lr (pc) on exception stack
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str r2, [sp, #64] @ Save spsr (cpsr) on exception stack
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mrc p15, 0, r3, c5, c0, 0
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str r3, [sp, #68] @ DFSR
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mrc p15, 0, r3, c5, c0, 1
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str r3, [sp, #72] @ IFSR
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mrc p15, 0, r3, c6, c0, 0
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str r3, [sp, #76] @ FAR
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mrc p15, 0, r3, c6, c0, 1
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str r3, [sp, #80] @ WFAR
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mov r4, r0
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mov r5, sp
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@ bl deinitCpu
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mov r0, r4
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mov sp, r5
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mov r1, r5
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b guruMeditation @ r0 = exception type, r1 = reg dump ptr {r0-r14, pc (unmodified), CPSR, DFSR, IFSR, FAR, WFAR}
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END_ASM_FUNC
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BEGIN_ASM_FUNC irqHandler
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sub lr, lr, #4
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srsfd sp!, #PSR_SYS_MODE @ Store lr and spsr on system mode stack
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cps #PSR_SYS_MODE
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stmfd sp!, {r0-r3, r12, lr}
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ldr r12, =MPCORE_PRIV_BASE
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ldr r2, =g_irqIsrTable
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ldr r0, [r12, #0x10C] @ REG_GICC_INTACK
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and r1, r0, #0x7F
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cmp r1, #32
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mrclo p15, 0, r3, c0, c0, 5 @ Get CPU ID
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andlo r3, r3, #3
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addlo r1, r1, r3, lsl #5
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addhs r1, r1, #96
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ldr r3, [r2, r1, lsl #2]
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cmp r3, #0
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beq irqHandler_skip_processing
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cpsie i
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str r0, [sp, #-4]! @ A single ldr/str can't be interrupted
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blx r3
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ldr r0, [sp], #4
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ldr r12, =MPCORE_PRIV_BASE
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cpsid i
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irqHandler_skip_processing:
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str r0, [r12, #0x110] @ REG_GICC_EOI
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ldmfd sp!, {r0-r3, r12, lr}
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rfefd sp! @ Restore lr (pc) and spsr (cpsr)
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END_ASM_FUNC
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