mirror of
https://gitee.com/anod/open_agb_firm.git
synced 2025-05-06 05:44:11 +08:00
231 lines
6.0 KiB
C
231 lines
6.0 KiB
C
/*-----------------------------------------------------------------------*/
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/* Low level disk I/O module SKELETON for FatFs (C)ChaN, 2019 */
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/*-----------------------------------------------------------------------*/
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/* If a working storage control module is available, it should be */
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/* attached to the FatFs via a glue function rather than modifying it. */
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/* This is an example of glue functions to attach various exsisting */
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/* storage control modules to the FatFs module with a defined API. */
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/*-----------------------------------------------------------------------*/
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#include "ff.h" /* Obtains integer types */
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#include "fatfs/diskio.h" /* Declarations of disk functions */
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#include "types.h"
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#include "drivers/tmio.h"
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#include "drivers/mmc/sdmmc.h"
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#include "arm9/drivers/ndma.h"
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#include "drivers/cache.h"
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#include "arm9/drivers/timer.h"
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/*-----------------------------------------------------------------------*/
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/* Get Drive Status */
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/*-----------------------------------------------------------------------*/
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DSTATUS disk_status (
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BYTE pdrv /* Physical drive nmuber to identify the drive */
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)
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{
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(void)pdrv;
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return SDMMC_getDiskStatus(SDMMC_DEV_CARD);
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}
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/*-----------------------------------------------------------------------*/
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/* Inidialize a Drive */
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/*-----------------------------------------------------------------------*/
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DSTATUS disk_initialize (
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BYTE pdrv /* Physical drive number to identify the drive */
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)
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{
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(void)pdrv;
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// Workaround for card detect time.
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unsigned timeout = 5;
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while(!TMIO_cardDetected() && timeout > 0)
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{
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TIMER_sleepMs(2);
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timeout--;
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}
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if(timeout == 0)
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return STA_NODISK | STA_NOINIT;
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return (SDMMC_init(SDMMC_DEV_CARD) == SDMMC_ERR_NONE ? 0 : STA_NOINIT);
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}
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/*-----------------------------------------------------------------------*/
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/* Read Sector(s) */
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/*-----------------------------------------------------------------------*/
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DRESULT disk_read (
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BYTE pdrv, /* Physical drive nmuber to identify the drive */
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BYTE *buff, /* Data buffer to store read data */
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LBA_t sector, /* Start sector in LBA */
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UINT count /* Number of sectors to read */
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)
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{
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(void)pdrv;
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DRESULT res = RES_OK;
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if((uintptr_t)buff % 4 == 0)
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{
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// Warning! Flush before transfer only works on ARM9 (no speculative prefetching)!
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flushDCacheRange(buff, 512 * count);
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NdmaCh *const ndmaCh = getNdmaChRegs(5);
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ndmaCh->sad = (u32)getTmioFifo(getTmioRegs(1)); // TODO: SDMMC dev to FIFO function.
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ndmaCh->dad = (u32)buff;
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ndmaCh->wcnt = 512 / 4;
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ndmaCh->bcnt = NDMA_FASTEST;
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ndmaCh->cnt = NDMA_EN | NDMA_START_TMIO3 | NDMA_REPEAT_MODE |
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NDMA_BURST(64 / 4) | NDMA_SAD_FIX | NDMA_DAD_INC;
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do
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{
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const u16 blockCount = (count > 0xFFFF ? 0xFFFF : count);
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if(SDMMC_readSectors(SDMMC_DEV_CARD, sector, NULL, blockCount) != SDMMC_ERR_NONE)
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{
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res = RES_ERROR;
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break;
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}
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sector += blockCount;
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count -= blockCount;
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} while(count > 0);
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// Stop DMA.
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ndmaCh->cnt = 0;
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}
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else
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{
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// TODO: More optimization. For unaligned buffers we could use a bounce buffer but it costs extra memory.
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do
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{
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const u16 blockCount = (count > 0xFFFF ? 0xFFFF : count);
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if(SDMMC_readSectors(SDMMC_DEV_CARD, sector, buff, blockCount) != SDMMC_ERR_NONE)
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{
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res = RES_ERROR;
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break;
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}
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buff += blockCount;
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sector += blockCount;
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count -= blockCount;
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} while(count > 0);
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}
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return res;
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}
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/*-----------------------------------------------------------------------*/
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/* Write Sector(s) */
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/*-----------------------------------------------------------------------*/
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#if FF_FS_READONLY == 0
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DRESULT disk_write (
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BYTE pdrv, /* Physical drive nmuber to identify the drive */
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const BYTE *buff, /* Data to be written */
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LBA_t sector, /* Start sector in LBA */
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UINT count /* Number of sectors to write */
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)
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{
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(void)pdrv;
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DRESULT res = RES_OK;
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if((uintptr_t)buff % 4 == 0)
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{
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flushDCacheRange(buff, 512 * count);
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NdmaCh *const ndmaCh = getNdmaChRegs(5);
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ndmaCh->sad = (u32)buff;
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ndmaCh->dad = (u32)getTmioFifo(getTmioRegs(1)); // TODO: SDMMC dev to FIFO function.
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ndmaCh->wcnt = 512 / 4;
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ndmaCh->bcnt = NDMA_FASTEST;
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ndmaCh->cnt = NDMA_EN | NDMA_START_TMIO3 | NDMA_REPEAT_MODE |
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NDMA_BURST(64 / 4) | NDMA_SAD_INC | NDMA_DAD_FIX;
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do
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{
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const u16 blockCount = (count > 0xFFFF ? 0xFFFF : count);
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if(SDMMC_writeSectors(SDMMC_DEV_CARD, sector, NULL, blockCount) != SDMMC_ERR_NONE)
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{
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res = RES_ERROR;
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break;
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}
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sector += blockCount;
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count -= blockCount;
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} while(count > 0);
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// Stop DMA.
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ndmaCh->cnt = 0;
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// NDMA hardware bug workaround.
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(void)*((const vu8*)buff);
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}
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else
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{
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// TODO: More optimization. For unaligned buffers we could use a bounce buffer but it costs extra memory.
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do
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{
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const u16 blockCount = (count > 0xFFFF ? 0xFFFF : count);
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if(SDMMC_writeSectors(SDMMC_DEV_CARD, sector, buff, blockCount) != SDMMC_ERR_NONE)
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{
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res = RES_ERROR;
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break;
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}
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buff += blockCount;
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sector += blockCount;
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count -= blockCount;
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} while(count > 0);
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}
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return res;
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}
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#endif
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/*-----------------------------------------------------------------------*/
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/* Miscellaneous Functions */
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/*-----------------------------------------------------------------------*/
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DRESULT disk_ioctl (
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BYTE pdrv, /* Physical drive nmuber (0..) */
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BYTE cmd, /* Control code */
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void *buff /* Buffer to send/receive control data */
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)
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{
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(void)pdrv;
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DRESULT res = RES_OK;
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switch(cmd)
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{
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case GET_SECTOR_COUNT:
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*(DWORD*)buff = SDMMC_getSectors(SDMMC_DEV_CARD);
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break;
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case GET_SECTOR_SIZE:
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*(WORD*)buff = 512;
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break;
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case GET_BLOCK_SIZE:
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*(DWORD*)buff = 0x100; // Default to 128 KiB. TODO: Get this from the driver.
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case CTRL_TRIM:
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// TODO: Implement this.
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case CTRL_SYNC:
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break;
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default:
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res = RES_PARERR;
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}
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return res;
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} |