mirror of
https://gitee.com/anod/open_agb_firm.git
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149 lines
4.5 KiB
ArmAsm
149 lines
4.5 KiB
ArmAsm
/*
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* This file is part of open_agb_firm
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* Copyright (C) 2021 derrek, profi200
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "asm_macros.h"
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#include "mem_map.h"
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.syntax unified
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.cpu mpcore
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.fpu vfpv2
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@ void lgyLinkRecv16(u16 *dst, u32 size)
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BEGIN_ASM_FUNC lgyLinkRecv16
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add r1, r0, r1 @ r1 = r0 + r1;
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ldr r12, =0x10141100 @ r12 = ®_LGY11_MODE; // Base address.
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mov r2, #0 @ All buttons pressed (start signal).
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mov r3, #0xFFFFFFFF @ Override all buttons. Should be 0x3FF but his works too.
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strh r2, [r12, #0x12] @ REG_LGY11_PAD_VAL = r2;
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cpsid i @ Disable IRQs. Timing is critical.
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strh r3, [r12, #0x10] @ REG_LGY11_PAD_SEL = r3;
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lgyLinkRecv16_byte1_lp:
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ldrh r2, [r12, #0x0A] @ r2 = REG_LGY11_PADCNT;
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tst r2, #1<<8
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beq lgyLinkRecv16_byte1_lp @ while(!(r2 & 1u<<8));
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uxtb r2, r2 @ r2 = r2 & 0xFFu;
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lgyLinkRecv16_byte2_lp:
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ldrh r3, [r12, #0x0A] @ r3 = REG_LGY11_PADCNT;
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tst r3, #1<<8
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bne lgyLinkRecv16_byte2_lp @ while(r3 & 1u<<8);
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orr r2, r2, r3, lsl #8 @ r2 = r3<<8 | r2;
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strh r2, [r0], #2 @ *r0++ = r2;
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cmp r1, r0
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bhi lgyLinkRecv16_byte1_lp @ while(r0 < r1);
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cpsie i @ Enable IRQs.
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bx lr
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END_ASM_FUNC
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@ void lgyLinkRecv32(u32 *dst, u32 size)
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BEGIN_ASM_FUNC lgyLinkRecv32
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add r1, r0, r1 @ r1 = r0 + r1;
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ldr r12, =0x10141100 @ r12 = ®_LGY11_MODE; // Base address.
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mov r2, #0 @ All buttons pressed (start signal).
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mov r3, #0xFFFFFFFF @ Override all buttons. Should be 0x3FF but his works too.
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strh r2, [r12, #0x12] @ REG_LGY11_PAD_VAL = r2;
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cpsid i @ Disable IRQs. Timing is critical.
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strh r3, [r12, #0x10] @ REG_LGY11_PAD_SEL = r3;
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lgyLinkRecv32_byte1_lp:
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ldrh r2, [r12, #0x0A] @ r2 = REG_LGY11_PADCNT;
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tst r2, #1<<8
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beq lgyLinkRecv32_byte1_lp @ while(!(r2 & 1u<<8));
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uxtb r2, r2 @ r2 = r2 & 0xFFu;
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lgyLinkRecv32_byte2_lp:
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ldrh r3, [r12, #0x0A] @ r3 = REG_LGY11_PADCNT;
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tst r3, #1<<8
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bne lgyLinkRecv32_byte2_lp @ while(r3 & 1u<<8);
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orr r2, r2, r3, lsl #8 @ r2 = r3<<8 | r2;
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lgyLinkRecv32_byte3_lp:
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ldrh r3, [r12, #0x0A] @ r3 = REG_LGY11_PADCNT;
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tst r3, #1<<8
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beq lgyLinkRecv32_byte3_lp @ while(!(r3 & 1u<<8));
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bic r3, r3, #1<<8 @ r3 &= ~(1u<<8);
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orr r2, r2, r3, lsl #16 @ r2 = r3<<16 | r2;
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lgyLinkRecv32_byte4_lp:
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ldrh r3, [r12, #0x0A] @ r3 = REG_LGY11_PADCNT;
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tst r3, #1<<8
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bne lgyLinkRecv32_byte4_lp @ while(r3 & 1u<<8);
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orr r2, r2, r3, lsl #24 @ r2 = r3<<24 | r2;
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str r2, [r0], #4 @ *r0++ = r2;
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cmp r1, r0
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bhi lgyLinkRecv32_byte1_lp @ while(r0 < r1);
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cpsie i @ Enable IRQs.
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bx lr
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END_ASM_FUNC
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@ void lgyLinkSend32(const u32 *src, u32 size)
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BEGIN_ASM_FUNC lgyLinkSend32
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add r1, r0, r1 @ r1 = r0 + r1;
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ldr r12, =0x10141100 @ r12 = ®_LGY11_MODE; // Base address.
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mov r2, #0 @ All buttons pressed (start signal).
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mov r3, #0xFFFFFFFF @ Override all buttons. Should be 0x3FF but his works too.
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strh r2, [r12, #0x12] @ REG_LGY11_PAD_VAL = r2;
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cpsid i @ Disable IRQs. Timing is critical.
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strh r3, [r12, #0x10] @ REG_LGY11_PAD_SEL = r3;
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lgyLinkSend32_word_lp:
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ldr r2, [r0], #4
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strh r2, [r12, #0x12]
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lsr r2, r2, #8
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lgyLinkSend32_byte1_lp:
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ldrh r3, [r12, #0x0A]
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cmp r3, #0xFF
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bne lgyLinkSend32_byte1_lp
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strh r2, [r12, #0x12]
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lsr r2, r2, #8
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lgyLinkSend32_byte2_lp:
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ldrh r3, [r12, #0x0A]
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cmp r3, #0xFF
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beq lgyLinkSend32_byte2_lp
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strh r2, [r12, #0x12]
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lsr r2, r2, #8
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lgyLinkSend32_byte3_lp:
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ldrh r3, [r12, #0x0A]
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cmp r3, #0xFF
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bne lgyLinkSend32_byte3_lp
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strh r2, [r12, #0x12]
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lsr r2, r2, #8
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lgyLinkSend32_byte4_lp:
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ldrh r3, [r12, #0x0A]
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cmp r3, #0xFF
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beq lgyLinkSend32_byte4_lp
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cmp r1, r0
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bhi lgyLinkSend32_word_lp @ while(r0 < r1);
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bx lr
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END_ASM_FUNC
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