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https://gitee.com/anod/open_agb_firm.git
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78da297199
gfx: 常量大改名、函数大改名，增加了双缓冲的一些驱动函数 其他：基本是ARM9/ARM11宏修改和BIT取值修改，bool从c风格转成c++强类型风格等。sha.c使用了memory.h进行的改动(copy32)
156 lines
4.0 KiB
C
156 lines
4.0 KiB
C
/*
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* This file is part of libn3ds
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* Copyright (C) 2024 derrek, profi200
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "types.h"
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#include "drivers/corelink_dma-330.h"
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#include "drivers/cache.h"
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#ifdef __ARM11__
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#ifdef USE_NEW_CDMA
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#error "TODO: New3DS CDMA"
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#else
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#define CHANNELS (8u)
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#define PERIPHALS (18u)
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#define IRQ_LINES (9u) // The controller reports 16 but we only have 9 physical lines.
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#endif // ifdef USE_NEW_CDMA
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#elif __ARM9__
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#define CHANNELS (4u)
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#define PERIPHALS (8u)
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#define IRQ_LINES (12u)
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#endif // ifdef __ARM11__
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#define INTEN_VAL (BIT(IRQ_LINES) - 1) // Not 32 bit safe!
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static inline void waitChannelStatus(const vu32 *const channel_csr, u8 status)
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{
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while((*channel_csr & CSR_STAT_MASK) != status);
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}
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static inline void waitDebugBusy(const Dma330 *const dma330)
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{
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while(dma330->dbgstatus & DBGSTATUS_BUSY);
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}
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static void sendDebugCmd(Dma330 *const dma330, u32 inst0, u32 inst1)
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{
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waitDebugBusy(dma330);
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dma330->dbginst0 = inst0;
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dma330->dbginst1 = inst1;
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dma330->dbgcmd = DBGCMD_EXECUTE;
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}
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void DMA330_init(void)
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{
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static bool inited = false;
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if(inited) return;
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inited = true;
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Dma330 *const dma330 = getDma330Regs();
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// Kill manager thread.
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sendDebugCmd(dma330, DBGINST0(0x01u, 0, DBGINST0_THR_MGR), 0);
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// Kill all channels.
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for(u32 i = 0; i < CHANNELS; i++)
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{
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// DMAKILL channel.
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sendDebugCmd(dma330, DBGINST0(0x01u, i, DBGINST0_THR_CH), 0);
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}
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waitChannelStatus(&dma330->chStat[CHANNELS - 1].csr, CSR_STAT_STOPPED);
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dma330->inten = INTEN_VAL;
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dma330->intclr = 0xFFFFFFFF; // Clear all interrupts.
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dma330->wd = 0; // Watchdog aborts hanging channels.
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if(PERIPHALS > 0)
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{
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#ifdef __ARM11__
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u16 progBuf[33]; // Max 32 periphals + 1 for DMAEND.
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#elif __ARM9__
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u16 *progBuf = (u16*)(AHB_RAM_BASE + AHB_RAM_SIZE - 33 * 2); // ARM9 DTCM stack workaround.
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#endif // ifdef __ARM11__
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for(u32 i = 0; i < PERIPHALS; i++)
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{
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// DMAFLUSHP i.
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progBuf[i] = i<<11 | 0x35u;
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}
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progBuf[PERIPHALS] = 0; // DMAEND.
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cleanDCacheRange(progBuf, 33 * 2);
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// DMAGO channel 0 non-secure.
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sendDebugCmd(dma330, DBGINST0(0u<<8 | 0xA2u, 0, DBGINST0_THR_MGR), (u32)progBuf);
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waitChannelStatus(&dma330->chStat[0].csr, CSR_STAT_STOPPED); // Wait for IRQ instead?
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}
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}
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u8 DMA330_run(u8 ch, const u8 *const prog)
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{
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Dma330 *const dma330 = getDma330Regs();
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u8 status;
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if((status = (dma330->chStat[ch].csr & CSR_STAT_MASK)) != CSR_STAT_STOPPED)
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return status;
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// DMAGO non-secure.
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sendDebugCmd(dma330, DBGINST0(ch<<8 | 0xA2u, 0, DBGINST0_THR_MGR), (u32)prog);
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return status;
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}
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u8 DMA330_status(u8 ch)
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{
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return getDma330Regs()->chStat[ch].csr & CSR_STAT_MASK;
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}
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void DMA330_ackIrq(u8 eventIrq)
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{
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getDma330Regs()->intclr = INTCLR_IRQ_CLR(eventIrq);
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}
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void DMA330_sev(u8 event)
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{
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// DMASEV.
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sendDebugCmd(getDma330Regs(), DBGINST0(event<<11 | 0x34u, 0, DBGINST0_THR_MGR), 0);
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}
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void DMA330_kill(u8 ch)
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{
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Dma330 *const dma330 = getDma330Regs();
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if((dma330->chStat[ch].csr & CSR_STAT_MASK) != CSR_STAT_STOPPED)
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{
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sendDebugCmd(dma330, DBGINST0(0x01u, ch, DBGINST0_THR_CH), 0);
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waitChannelStatus(&dma330->chStat[ch].csr, CSR_STAT_STOPPED);
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}
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}
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/*#ifdef __ARM11__
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#include "arm11/fmt.h"
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void DMA330_dbgPrint(void)
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{
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Dma330 *const dma330 = getDma330Regs();
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ee_printf("DSR: %08lX FTRD: %08lX\n", dma330->dsr, dma330->ftrd);
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for(u32 i = 0; i < CHANNELS; i++)
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{
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ee_printf(" CSR/FTR%lu: %08lX %08lX\n", i, dma330->chStat[i].csr, dma330->ftr[i]);
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}
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}
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#endif*/ // ifdef __ARM11__
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