mirror of
https://gitee.com/anod/open_agb_firm.git
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210 lines
6.1 KiB
C
210 lines
6.1 KiB
C
/*
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* This file is part of open_agb_firm
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* Copyright (C) 2021 derrek, profi200
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <assert.h>
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#include <string.h>
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#include "types.h"
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#include "drivers/lgy.h"
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#include "error_codes.h"
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#include "mem_map.h"
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#include "mmio.h"
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#include "drivers/cache.h"
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#include "arm9/arm7_stub.h"
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#include "fsutil.h"
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#include "arm9/debug.h"
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#include "drivers/sha.h"
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#include "util.h"
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#define LGY_REGS_BASE (IO_MEM_ARM9_ONLY + 0x18000)
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typedef struct
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{
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vu16 mode;
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u8 _0x2[0x7e];
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vu32 a7_vector[8]; // ARM7 vector override 32 bytes. Writable at runtime.
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u8 _0xa0[0x60];
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vu16 gba_save_type;
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u8 _0x102[2];
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vu8 gba_save_map; // Remaps the GBA save to ARM9 if set to 1.
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u8 _0x105[3];
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vu16 gba_rtc_cnt;
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u8 _0x10a[6];
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vu32 gba_rtc_bcd_date;
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vu32 gba_rtc_bcd_time;
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vu32 gba_rtc_toffset; // Writing bit 7 completely hangs all(?) GBA hardware.
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vu32 gba_rtc_doffset;
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vu32 gba_save_timing[4];
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} Lgy;
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static_assert(offsetof(Lgy, gba_save_timing) == 0x120, "Error: Member gba_save_timing of Lgy is not at offset 0x120!");
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ALWAYS_INLINE Lgy* getLgyRegs(void)
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{
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return (Lgy*)LGY_REGS_BASE;
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}
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static u32 g_saveSize = 0;
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static u32 g_saveHash[8] = {0};
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static char g_savePath[512] = {0};
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static void setupBiosOverlay(bool directBoot)
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{
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iomemcpy(getLgyRegs()->a7_vector, (u32*)_a7_overlay_stub, (u32)_a7_overlay_stub_size);
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//static const u32 biosVectors[8] = {0xEA000018, 0xEA000004, 0xEA00004C, 0xEA000002,
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// 0xEA000001, 0xEA000000, 0xEA000042, 0xE59FD1A0};
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//iomemcpy(getLgyRegs()->a7_vector, biosVectors, 32);
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iomemcpy((u32*)ARM7_STUB_LOC9, (u32*)_a7_stub_start, (u32)_a7_stub_size);
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if(!directBoot) *((vu8*)_a7_stub9_swi) = 0x26; // Patch swi 0x01 (RegisterRamReset) to swi 0x26 (HardReset).
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flushDCacheRange((void*)ARM7_STUB_LOC9, (u32)_a7_stub_size);
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}
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static u32 setupSaveType(u16 saveType)
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{
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Lgy *const lgy = getLgyRegs();
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lgy->gba_save_type = saveType;
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static const u8 saveSizeShiftLut[16] = {9, 9, 13, 13, 16, 16, 16, 16, 16, 16, 17, 17, 17, 17, 15, 0};
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const u32 saveSize = (1u<<saveSizeShiftLut[saveType & SAVE_TYPE_MASK]) & ~1u;
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g_saveSize = saveSize;
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// Flash chip erase, flash sector erase, flash program, EEPROM write.
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static const u32 saveTm512k4k[4] = {0x27C886, 0x8CE35, 0x184, 0x31170}; // Timing 512k/4k.
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static const u32 saveTm1m64k[4] = {0x17D43E, 0x26206, 0x86, 0x2DD13}; // Timing 1m/64k.
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const u32 *saveTm = saveTm512k4k;
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if(saveType == SAVE_TYPE_EEPROM_64k ||
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saveType == SAVE_TYPE_EEPROM_64k_2 ||
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(saveType >= SAVE_TYPE_FLASH_1m_MRX_RTC && saveType <= SAVE_TYPE_FLASH_1m_SNO))
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{
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saveTm = saveTm1m64k;
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}
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iomemcpy(lgy->gba_save_timing, saveTm, 16);
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return saveSize;
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}
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Result LGY_prepareGbaMode(bool directBoot, u16 saveType, const char *const savePath)
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{
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getLgyRegs()->mode = LGY_MODE_AGB;
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setupBiosOverlay(directBoot);
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const u32 saveSize = setupSaveType(saveType);
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strncpy_s(g_savePath, savePath, 511, 512);
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Result res = RES_OK;
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if(saveSize != 0)
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{
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res = fsQuickRead(savePath, (void*)SAVE_LOC, saveSize);
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if(res == RES_FR_NO_FILE)
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{
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// Ignore a missing save file and fill the save with 0xFFs.
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res = RES_OK;
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iomemset((u32*)SAVE_LOC, 0xFFFFFFFFu, saveSize);
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}
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// Hash the savegame so it's only backed up when changed.
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// Then flush the savegame region.
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sha((u32*)SAVE_LOC, saveSize, g_saveHash, SHA_IN_BIG | SHA_256_MODE, SHA_OUT_BIG);
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flushDCacheRange((void*)SAVE_LOC, saveSize);
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}
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return res;
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}
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Result LGY_setGbaRtc(const GbaRtc rtc)
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{
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// Set base time and date.
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Lgy *const lgy = getLgyRegs();
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lgy->gba_rtc_bcd_time = rtc.time;
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lgy->gba_rtc_bcd_date = rtc.date;
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//while(lgy->gba_rtc_cnt & LGY_RTC_CNT_BUSY);
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//lgy->gba_rtc_cnt = 0; // Legacy P9 does this. Useless?
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lgy->gba_rtc_toffset = 1u<<15; // Time offset 0 and 24h format.
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lgy->gba_rtc_doffset = 0; // Date offset 0.
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lgy->gba_rtc_cnt = LGY_RTC_CNT_WR;
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while(lgy->gba_rtc_cnt & LGY_RTC_CNT_BUSY);
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if(lgy->gba_rtc_cnt & LGY_RTC_CNT_WR_ERR) return RES_GBA_RTC_ERR;
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else return RES_OK;
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}
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Result LGY_getGbaRtc(GbaRtc *const out)
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{
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Lgy *const lgy = getLgyRegs();
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//while(lgy->gba_rtc_cnt & LGY_RTC_CNT_BUSY);
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//lgy->gba_rtc_cnt = 0; // Legacy P9 does this. Useless?
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lgy->gba_rtc_cnt = LGY_RTC_CNT_RD;
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while(lgy->gba_rtc_cnt & LGY_RTC_CNT_BUSY);
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if((lgy->gba_rtc_cnt & LGY_RTC_CNT_WR_ERR) == 0u)
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{
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out->time = lgy->gba_rtc_bcd_time;
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out->date = lgy->gba_rtc_bcd_date;
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return RES_OK;
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}
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return RES_GBA_RTC_ERR;
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}
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/*#include "arm9/hardware/timer.h"
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void LGY_gbaReset(void)
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{
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// Hook the SVC vector for 17 ms and hope it jumps to the
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// BIOS reset function skipping the "POSTFLG" check.
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Lgy *const lgy = getLgyRegs();
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lgy->a7_vector[2] = 0xEA00001F; // SVC_vector: b 0x8C @ resetHandler
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TIMER_sleepMs(17); // Wait 17 ms.
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// Restore vector.
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lgy->a7_vector[2] = 0xEA00004C; // SVC_vector: b 0x140 @ svcHandler
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}*/
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Result LGY_backupGbaSave(void)
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{
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Result res = RES_OK;
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const u32 saveSize = g_saveSize;
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if(saveSize != 0)
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{
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// Map savegame region to ARM9 side.
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Lgy *const lgy = getLgyRegs();
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lgy->gba_save_map = LGY_SAVE_MAP_9;
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// Make sure there is no stale data in the cache.
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invalidateDCacheRange((void*)SAVE_LOC, saveSize);
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u32 newHash[8];
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sha((u32*)SAVE_LOC, saveSize, newHash, SHA_IN_BIG | SHA_256_MODE, SHA_OUT_BIG);
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if(memcmp(g_saveHash, newHash, 32) != 0) // Backup save if changed.
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{
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// Update hash.
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memcpy(g_saveHash, newHash, 32);
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res = fsQuickWrite(g_savePath, (void*)SAVE_LOC, saveSize);
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}
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// Map savegame region back to ARM7 side.
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lgy->gba_save_map = LGY_SAVE_MAP_7;
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}
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return res;
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}
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