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80 lines
2.8 KiB
C
80 lines
2.8 KiB
C
#pragma once
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/*
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* This file is part of libn3ds
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* Copyright (C) 2024 profi200
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "types.h"
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#include "mem_map.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#define I2S_REGS_BASE (IO_COMMON_BASE + 0x45000)
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typedef struct
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{
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vu16 i2s1_cnt; // 0x0
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vu16 i2s2_cnt; // 0x2
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} I2sRegs;
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static_assert(offsetof(I2sRegs, i2s2_cnt) == 2, "Error: Member i2s2_cnt of I2sRegs is not at offset 2!");
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ALWAYS_INLINE I2sRegs* getI2sRegs(void)
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{
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return (I2sRegs*)I2S_REGS_BASE;
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}
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// I2S1_CNT
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// Note: Bits 12-14 are only writable if the enable bit is 0.
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#define I2S1_DSP_VOL(v) ((v) & 0x3Fu) // DSP master volume. 32 is 100%.
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#define I2S1_LGY_VOL(v) (((v) & 0x3Fu)<<6) // GBA and DS(i) hardware master volume. 32 is 100%.
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#define I2S1_UNK12 BIT(12) // Enables the microphone input? Some kind of input/output select.
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#define I2S1_FREQ_32KHZ (0u) // 268111856 / 8192 = 32728.498046875 Hz.
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#define I2S1_FREQ_47KHZ BIT(13) // 268111856 / 5632 = 47605.088068181818181818182 Hz.
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#define I2S1_MCLK1_8MHZ (0u) // CODEC MCLK1. 268111856 / 32 / (1000 * 1000) = 8.3784955 MHz.
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#define I2S1_MCLK1_16MHZ BIT(14) // CODEC MCLK1. 268111856 / 16 / (1000 * 1000) = 16.756991 MHz.
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#define I2S1_EN BIT(15) // Enable I2S1 interface.
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// I2S2_CNT
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// Note: Bits 13, 14 are only writable if the enable bit is 0.
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#define I2S2_FREQ_32KHZ (0u) // 268111856 / 8192 = 32728.498046875 Hz.
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#define I2S2_FREQ_47KHZ BIT(13) // 268111856 / 5632 = 47605.088068181818181818182 Hz.
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#define I2S2_MCLK2_8MHZ (0u) // CODEC MCLK2. 268111856 / 32 / (1000 * 1000) = 8.3784955 MHz.
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#define I2S2_MCLK2_16MHZ BIT(14) // CODEC MCLK2. 268111856 / 16 / (1000 * 1000) = 16.756991 MHz.
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#define I2S2_EN BIT(15) // Enable I2S2 interface.
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static inline void I2S1_setDspVolume(const u8 vol)
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{
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I2sRegs *const i2s = getI2sRegs();
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i2s->i2s1_cnt = (i2s->i2s1_cnt & ~I2S1_DSP_VOL(0x3Fu)) | I2S1_DSP_VOL(vol);
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}
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static inline void I2S1_setLgyVolume(const u8 vol)
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{
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I2sRegs *const i2s = getI2sRegs();
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i2s->i2s1_cnt = (i2s->i2s1_cnt & ~I2S1_LGY_VOL(0x3Fu)) | I2S1_LGY_VOL(vol);
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}
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#ifdef __cplusplus
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} // extern "C"
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#endif |